[CuriousCosmic]

It's worth noting that what you are describing is basically an FPGA nowadays.

FPGAs don't have "gates" as the basic building blocks.

Instead you have "logic cells" which are composed of a fixed size (often either 4 or 6 bit) LUT (look up table), one or two flip flops, and a multiplexer to choose whether to use the stored value or the new LUT value. They also sometimes contain basic ALU components like adders or multipliers. Those logic cells are then usually grouped together to form logic blocks which might have some amount of local memory/cache available. These blocks are the smallest "discrete" component of an FPGA and are configured as a whole block with configurations determined at synthesis time.

On top of this you have memory blocks and other "hard IP" like DSP slices, etc distributed around the IC for these logic blocks to take advantage of.

And then finally you have larger hard IP that a given chip only has a few of. These include your PLLs (phase locked loops) or other analog clock multiplier hardware (to allow you to run multiple clock domains on a single FPGA), your encryption and encoding/decoding accelerators, dedicated protocol hard IP (ethernet, PCIE, etc), and hardware that is directly attached to the IO (ADCs, DACs, pullup/pulldown resistor configuration, etc). And increasingly nowadays also full blown hard IP CPUs and GPUs that can interact directly with the FPGA.

[adrian_b]

No the previous poster has not described a FPGA, but a FPGA-like device that contains much more complex fixed-function blocks than the small DSP multipliers that are available in the currently existing FPGAs.

With 18-bit integer multipliers or the like you cannot compete in energy efficiency with the arithmetic execution units of a GPU.

The so-called CGRAs are an attempt to revive the idea of reconfigurable dataflow processors, with the hope of combining in the same device the advantages of the FPGAs with the advantages of the GPUs.

[imtringued]

Xilinx FPGAs already contain a "dataflow processor" called "AI Engine" and they tend to have more TOPS/TFLOPS than the programmable fabric and DSPs combined.

[imtringued]

That isn't even everything. Nowadays Xilinx FPGAs come with "AI engine tiles". Some FPGAs come with 400 tiles. Each of those tiles is a C programmable processor running with a local scratchpad memory. So an FPGA is probably the most heterogenous type of chip ever invented.