[adrian_b]

Also about CGRA:

https://efficient.computer/technology

The claims about improved energy efficiency (due to the elimination of the instruction fetching and decoding and of the register files) can be correct only when such a CGRA is not used as a general-purpose CPU, but as an accelerator used to implement various iterative algorithms, i.e. when its dataflow compiler could be used as a replacement for something like CUDA.

A FPGA would have the same energy efficiency advantage for algorithms without much numeric computation, but it is not competitive with a GPU or a CGRA for most numeric computations, except DSP, because it includes only small fixed-point multipliers and adders, which are not as efficient as big vector floating-point fused-multiply-add execution units.