[xw390111]

No.

Every shrink, in theory, is supposed to mean you could have twice as many transistors per unit area. So although dimensions of transistors are similar from say 7nm to 5nm one should be able to pack twice as many in. And so when the foundry can double the transistor density, as measured over large areas, it gets to go to the next lowest number in the sequence. i.e. (7^2)/2 is roughly 5^2.

You won’t get that many, for lots of EE reasons, but in theory you could.

It’s also important to remember there are lots of things other than transistors in there. Contacts, wires, etc etc. and they have dimensions and packing requirements too. And if you can shrink or more tightly pack those things, transistor density also rises.