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by wtallis 845 days ago
TSMC's N3E (their first 3nm that will actually see broad use) has the same SRAM cell size as N5. Their original 3nm had 5% smaller SRAM cell size than N5, but that turned out to be too aggressive and the process was too expensive for most of their customers. So for the time being, TSMC has indeed hit a wall for SRAM scaling. But it looks like N3P will be able to shrink SRAM again.
2 comments

Hopefully we can get really widespread 2.5D packaging and just start including “oops all SRAM” layers.
Thanks, I had missed that development.