I don't think they were decrying the use of Angstroms, but rather the continued use of size-based terminology that has become decoupled from the actual size of any physical features.
I think they meant fake as in "doesn't relate to any size of the transistors", as the gate/metal pitch sizes are e.g. 40 nm and 54 nm respectively for Intel's "7nm" node [0], even the fin pitch is 34 nm, so almost 5 times bigger than the marketing term would like to imply.
It does not refer to the physical size of any element or feature of the chips.
It's the marketing department's claim about what you'd have had to do to achieve "equivalent performance" using geometries (and probably other things) that are no longer used. Or to put it another way it's completely untethered from reality in every way.