[jgw]

I'd be curious to know that, too.

I'd be very surprised, as the capital outlay to start even a small ASIC team is not small. A single simulator license costs considerably more than what the fine folks at YC invest in the companies they have under their wing.

(I don't think it needs to be that way, BTW).

[nilsbunger]

The hardest part about fabless semiconductor startups is the lack of flexibility to pivot.

The time to design chips correctly is 10x-20x higher than doing the same in c++ (let alone a higher level language).

Example: in my previous company we needed to do some Jpeg decode in hardware. You have to buy a library for that. The library aint cheap so you have to evaluate vendors first, then work with lawyers to negotiate a licensing agreement. Then you design, implement, and test integration into your chip. All of this takes 2-3 man-months.

By contrast, we prototyped it in sw in an afternoon, and could be out the door with tests and production polish in less than a week.

You can use fpgas or low-NRE ASICs like eASIC to reduce the build costs, but engineering hardware is really slow.