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by Findecanor 880 days ago
The SG2380 is a bit weird though. Four of the P670 cores are clocked lower than the others.

The X280 cores are not RVA22 compliant. They are only RV64GCV, so they can't run the same code as the P670 cores. SophGo's datasheet lists these cores under "AI accelerator", paired with a "TPU", so they were never intended to run general purpose code.

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X280s where design for AI applications, and have an interface for custom vendor extension. If I understood it correctly SophGo plans to add a matmul extension to it.

You wouldn't be able to run P670s and X280s on and schedule applications between them anyways, because they have different vector lengths.

>You wouldn't be able to run P670s and X280s on and schedule applications between them anyways, because they have different vector lengths.

Not trivial, but also not impossible.

e.g. I understand there's some bits to check whether vector has been used. It would also be abnormal for a process to be in wait (as opposite to ready) within a vector loop.

Having a chip like this one deployed will definitely enable experimentation and research on how to best deal with this situation.