[jcalvinowens]

>> others point out that the LVDC actually contains triply-redundant logic. The logic gives 3 answers and the voting mechanism picks the winner.

This is a very minor point... but three of something isn't triple redundancy: it's double redundancy. Two is single redundancy, one is no redundancy.

Unless the voting mechanism can somehow produce a correct answer from differing answers from all three implementations of the logic, I don't understand how it could be considered triply redundant. Is the voting mechanism itself functionally a fourth implementation?

[kens]

The official name for the LVDC's logic is triple modular redundant (TMR). The voting mechanism simply picks the majority, so it can tolerate one failure. The LVDC is a serial computer, which makes voting simpler to implement, since you're only dealing with one bit at a time.

[somat]

I find it fascinating the two different schools of thought exposed in the LVDC and the AGC.

The LVDC was a highly redundant can not fail design. the AGC had no redundancy and was designed to recover quickly if failure occurred.