> Let's consider your proposed 8086 done in a 14 nm process. Let's say we do it in CMOS, and maybe even throw in a few extra features, and it takes 100,000 transistors. The die would be very tiny, so unbelievably tiny. You could fit three thousand of them, with room to spare, in a single square millimetre, which is an area likely smaller than the period at the end of this sentence.
Sure but 8051 is probably the most widely manufactured processor in human history (along their clones and derivatives) and they were originally fabbed using a 3.5 µm (3500 nm) NMOS process (IIRC). What I'd like to know is what the most advanced process/node has been used to manufacture a production 6502, Z80, or 8051 (or other old standard). Has anyone ever fabbed any of the those CPUs/MCUs at 130 nm or better?
Though, I will say that I'm amazed that anyone is still mass producing digital products on a 6" (if not smaller) wafer using a node that was invented in the mid 1970s (300 mm wafers are the current standard with the next proposed step being 450 mm). I mention digital because a lot of analog gear (and I think some MEMS) is fabbed using what most of us would consider ancient process nodes.
> Let's consider your proposed 8086 done in a 14 nm process. Let's say we do it in CMOS, and maybe even throw in a few extra features, and it takes 100,000 transistors. The die would be very tiny, so unbelievably tiny. You could fit three thousand of them, with room to spare, in a single square millimetre, which is an area likely smaller than the period at the end of this sentence.