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by IshKebab 969 days ago
That looks like a pure marketing slide to me. I don't think it would make sense to actually have separate dedicated silicon for these.
2 comments

It is a pure marketing slide. The M3 variants floorplans don't look anything like that, as can be seen on other pictures of the dies.

That being said, it's pretty common to have dedicated silicon for video codecs. It normally takes the form of a little DSP with custom instructions to accelerate operations specific to the codec.

I agree that is how I'd expect it to be implemented, but I'm not sure how small it would be given the processing bandwidth we are talking about for 4k video.

I'm guessing this is a distinct region of the chip and not integrated with CPU/GPU since they scale up by replicating those blocks and wouldn't want to redundantly place that hardware. Having it separate also allows a team to work on it independently.

I think the relative size of the media engines is accurate in that slide, so then it comes down to how large the ProRes parts are in other chips. They are probably a couple of the unlabeled regions next to the performance cores in the M1 Pro die shot below, but I don't know which.

https://images.anandtech.com/doci/17019/M1PRO.jpg Taken from: https://www.anandtech.com/show/17024/apple-m1-max-performanc...

A GPU is also not a monolith. As you say, there are some functions that scale with the number of compute units, but others don't need to (e.g. display scan-out controllers); it would accordingly make sense to make the video coding functions part of the latter.

And video decoding/encoding is definitely at least GPU-adjacent, since it usually also involves scaling, color space transformations etc.

> The M3 variants floorplans don't look anything like that

Maybe I'm misunderstanding what you're saying, but the slide is of an A17, not an M3 chip.

Oh, fair enough, got my wires crossed from the M3 announcement.

The A17 floorplan looks nothing like that either.

https://twitter.com/highyieldYT/status/1711453511848706228

Yes exactly. But are you going to have a different DSP for each codec? Doubtful.
I've seen it. Sometimes because the DSP is hyperspecialized for a particular codec. Sometimes just because the SoC vendor bought the hard codecs from different sub vendors.
How would you do it in hardware otherwise?
With a DSP that has generic instructions that are especially useful for video codecs.
You can either have a fully dedicated core for codecs, or you can just put certain codec related operations (like DCT-related SIMD) in your main cores. Cryptographic acceleration tends to use the latter approach.
Video codecs usually come with GPUs, not CPUs. It is only on SoCs where this distinction is a more fuzzy.

On a GPU, you didn't have an option to interleave normal program stream with specialized partial-decoding instruction. You put encoded frame in and you get decoded frame back, the media engine was separate block from compute.

Though this is also changing; see Intel GuC firmware, which has (optionally) some decoding, encoding and processing based on compute.