Yes, however, it's best suited for the complex parts (logic that needs a lot of inputs and few outputs) due to the fact that the eeproms it generates data for are arranged as 8 bit output.
It might also be somewhat slow compared to discrete gates, the AT27C512 I'm using is rated at 45ns access time, while a normal DIP gate is usually around 5.
That said, 45 ns, means it should function up to about 20 mhz if I'm not totally wrong (which I've been known to be before).
I made this because I need some logic for my DEC J-11 CPU and to keep it period-ish-correct didn't want to bring in an fpga, I'll use it for power-up settings and controlling memory bus access. I could have used a PLA or GAL, but I don't have any and I have about a kilogram of the beautiful old quartz window EEPROMs :)
it generates data for are arranged as 8 bit output
There were/are x4 proms (e.g. am27s10 == 256x4).
45 ns, means it should function up to about 20 mhz
Theoretically. If you're careful.
I need some logic for my DEC J-11 CPU
Cool...I keep wanting to do something with my J-11s beyond play with ODT. What are you doing for storage? That seems to be the problem with most PDP-11 projects...most of the available OSes are deeply tied to storage related DECisms.
I'm going from scratch with the J-11, it won't run UNIX, my only real "goal" is to have a self-contained unit, something with a bit-mapped display and direct keyboard input, not just a serial port. I will probably use sram, and for permanent storage, long term, I'd like to do more with EEPROMs, but for starters, probably an SD card.
Definitely, if you just need some nand gates, this is probably the worst way of doing it, where it can be of some use is when you want to describe more complex behavior, where you quickly end up with a mix of tens, hundreds or thousands of gates.
[0] https://news.ycombinator.com/item?id=37548907
[1] https://bailleux.net/pub/ob-project-gray1.pdf