include $(shell find $(BUILD_DIR) -type f -name '\*.d')
SRC = $(wildcard src/\*.c) OBJ = $(SRC:.c=.o) SDEPS = $(SRC:.c=.d) EXE = myapp INC = include CFLAGS ?= -Os -MMD -MP LDFLAGS ?= %.o: %.c $(INC) Makefile $(CC) $(CFLAGS) -c $< -o $@ $(EXE): $(OBJ) $(LD) $^ $(LDFLAGS) -o $@ # near the bottom of your Makefile -include $(SDEPS)