[ravi-delia]

Oh neat, I thought it was still unoptimized compared to gengc (which afaik does still use write protection). I'll have to check it out, see if I have a machine it'll run faster on

[hayley-patton]

gencgc uses software protection on some but not all architectures -- I recall x86-64 and MIPS but not ARM though. On x86-64 with SBCL 2.3.8 for example:

    * (disassemble #'(setf svref))
    ; disassembly for (SETF SVREF)
    ; Size: 39 bytes. Origin: #x5349B00D                          ; (SETF SVREF)
    ; 0D:       483B77F9         CMP RSI, [RDI-7]
    ; 11:       731D             JAE L0
    ; 13:       488D44B701       LEA RAX, [RDI+RSI*4+1]
                                 ↓ card marking here
    ; 18:       48C1E80A         SHR RAX, 10
    ; 1C:       25FFFF0F00       AND EAX, 1048575
    ; 21:       41C6040400       MOV BYTE PTR [R12+RAX], 0
                                 ↓ pointer store here
    ; 26:       488954B701       MOV [RDI+RSI*4+1], RDX
    ; 2B:       C9               LEAVE
    ; 2C:       F8               CLC
    ; 2D:       C3               RET
    ; 2E:       CC10             INT3 16                          ; Invalid argument count trap
    ; 30: L0:   CC24             INT3 36                          ; INVALID-VECTOR-INDEX-ERROR
    ; 32:       1C               BYTE #X1C                        ; RDI(d)
    ; 33:       19               BYTE #X19                        ; RSI(a)