[zxcvgm]

Interestingly the Pi 5 has moved most I/O like Ethernet, USB, MIPI and GPIO into a custom I/O controller chip called the RP1. It talks to the main CPU over 4-lane PCIe. They also have a custom PMIC (Dialog DA9091) with a built-in RTC and support for external backup battery. Everything else seems pretty standard.

[schappim]

> Interestingly the Pi 5 has moved most I/O like Ethernet, USB, MIPI and GPIO into a custom I/O controller chip called the RP1.

For cost-saving reasons, the I/O is located in the RP1 Southbridge (which has a larger process size) instead of the SoC. I had the opportunity to preview the Pi5 and have provided a detailed breakdown of the RP1's components [1]. In summary, what I/O functionalities does the RP1 manage? Essentially, it handles almost all of them.

[1] https://youtu.be/q_QPM9xV_sw?si=dq-EEUp2u05-KrhM&t=252

[dboreham]

Just like a 1970s IBM mainframe ;)

[hedora]

I’m surprised they are only claiming 2-3x performance improvements for this vs. the four.

The four was great until I realized that they hung all sorts of stuff off the same bottlenecked USB controller.

I’d think moving them to PCIe would net much more than 2-3x real world improvement.