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by govg
997 days ago
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Could you mention where these chips from older mature nodes are used and what they look like(in terms of form factor / development environment), for context? I understand some aspects of chips being used for automobiles , but aren't most compute oriented chips based off ARM designs and such which will be on the newer nodes? |
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As an example, the TI Hercules is an old but by no means obsolete safety processor. It's one of the best ways to get single-core lockstep capabilities for new designs today. The original TMS570LS parts are still built on a 130 nm process, but the "newer" (not new, but also newest) TMS570LC parts are on 65 nm.
These days most of my work hours are focused on the Aurix TC3xx, which is a 40 nm (tweaked 45 nm) part. This is a multi-core safety processor with an obviously higher transistor count than the Hercules (which is why it was selected for application), matching its smaller process.
Similarly in FPGA land, the Lattice MachXO is on an 130 nm process, while the newer MachXO2 migrated to 65 nm. I know Lattice does newer parts on 28 nm (and I'm sure there's 45 nm out there), but I haven't run into them.
Certainly for more density-heavy applications newer processes (28 nm, often) have come to the forefront, and we're at the point that we're seeing cost cuts going from 90 nm to 28 nm for equivalent functionality. But a lot of these designs are pin-out limited (the silicon area is dominated by getting signals on and off chip, not by the total area of transistors), so cost very much doesn't scale with transistor density; the cost per transistor has gone down, but the cost per unit area has gone up.