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by marsRoverDev 1019 days ago
Our connectivity to mars is on the order of 12kbps, presumably better for the moon.

My other question would be whether this is due to the need to radiation harden stuff? We were developing for what effectively was equivalent to an arduino in terms of processing power due to the need for radiation hardening (and other legacy / slow moving reasons).

3 comments

> Our connectivity to mars is on the order of 12kbps

It depends on the spacecraft. DSN is currently talking with the Mars Reconnaissance Orbiter at 1 Mbit/s (https://eyes.nasa.gov/dsn/dsn.html, select MRO, click "more detail" in the bottom-left).

Wow, >46 minutes latency. IDK what I expected.
NAME Voyager 2

RANGE 20.00 billion km

ROUND-TRIP LIGHT TIME 1.54 days

DATA RATE 160.0 b/sec

Amazing.

We can't really get rid of the latency but we can increase the bandwidth by throwing a bunch of higher-power communication satellites on Mars.
We can certainly push more data from Mars, but the entire point of the article is that we probably won't have the bandwidth to receive it.

Unless we can convince congress and NASA execs to increase the budget and get more dishes built pronto.

Yep. We could cover Mar's sky with something similar to SpaceX's Starlink (high availability from any location on Mars) but with large data buffers and transmission systems that can pump the goods all the back to Earth.
Three geostationary satellites should do fine for the number of data consumers on Mars.
It's not bad seeing as Mars is 225 million to 401 million Km away depending on where it is in its orbit.
46 Light Minutes is pretty much the maximum, that's 827,427,184 Kilometers round trip which is a bit beyond the maximum distance to Mars so there's some processing delays thrown in there.
One of the key techniques for radiation hardening is big transistor geometries. Big transistors are less susceptiple to SEU (single event upset) caused by cosmic rays [0].

Unfortunately big transistors are old transistors. Modern 7 nm geometries are much too small to be rad-hard. Rad-hardness needs big 20-year-old geometries or even older. That also implies slower clock speeds.

[0] https://en.m.wikipedia.org/wiki/Single-event_upset

Surely redundant transistors would also be a useful technique. E.g. have an array of transistors at the current geometry, all doing the same function. The chance of a single event upsetting them all becomes unlikely.
Yes, the strategy IIRC SpaceX's Dragon uses is to have 3 more modern CPUs tied together, such that they're all running the same operation and checking each other. It mitigates errors without as much of a performance penalty.
> whether this is due to the need to radiation harden stuff?

It's been a very long time since I read about it so I cannot provide my source but yes that is likely part of it. There's also the resilience of the components to trauma to consider.