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by systems_glitch
1036 days ago
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Packaging had been a limiting factor for a long time, e.g. the Intel 8008 has the weird multiplexed bus it has, and requires so much external logic, because Intel was largely "just" a memory chip company at the time and couldn't package bigger than 18 pin DIPs. Prototype carriers were likely significantly more expensive for >40 pin DIPs, just due to the lower demand. The ceramic packages with a die well and glued or brazed lid are available as an off-the-shelf item for low run, prototype, or special chips, and that's what a lot of chips back then started off in, including the Z8000. As other comments suggest, escape routing was also a secondary issue. Not a problem for "Texas cockroach" 64-pin DIPs, but PGAs and such. |
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Intel management didn’t want to pivot to microchips despite the team’s pleads, so they left and founded Zilog, which eventually prompted Intel to pivot (https://www.amazon.com/Silicon-Invention-Microprocessor-Scie...)