[ajross]

> This was even though Intel’s 8086 was, by many measures, a design that was markedly inferior to the Z8000.

I don't see this as true at all. The 8086 segment registers are fine-grained, so you can use the single 16 bit value in a single register as a "pointer" to memory as long as you're OK with your blocks being allocated in 16 byte chunks and don't try to do array indexing on the raw value. This doesn't match the C memory model well, but it's very usable and for years DOS software exploited this trick to get clean addressing across the full 1M memory space of the PC with near-zero overhead[1].

The Z8000 had two-register addresses[2] and you needed to carry those two full words around everywhere. It's equivalent to writing DOS software with the "Huge" memory model pervasively (something pretty much no performance-sensitive software did, historically), because that's all the CPU could support. It's a big, big loss.

And all you get back for your trouble is a bigger register set, which looks great in a ISA document but doesn't really make up for the terrible memory access design. Zilog spent their transistors on the wrong things.

[1] Not zero, because there are only two usable segment registers to hold these pointers, but then the architecture had only 4 true GPRs anyway.

[2] IIRC (and seemingly confirmed by a quick wikipedia check) not even linear ones! The "segment offset" wasn't packed next to the low address bits. So you can't even do natural math on arrays bigger 64kb.