[Someone]

FTA: “One cheaper version would fit into a 40-pin package. This version would have its memory address sizes limited to 16-bits and so would only be able to use 64 KB of memory. A more expensive 48-pin version would have access to a 23-bit or 8 MB address space.

To support this approach, the architecture would be based on segmented addresses.”

I don’t see how that follows, given the example of the 6507. https://en.wikipedia.org/wiki/MOS_Technology_6507

“The 6507 (typically "sixty-five-oh-seven" or "six-five-oh-seven") is an 8-bit microprocessor from MOS Technology, Inc. It is a version of their 40-pin 6502 packaged in a 28-pin DIP, making it cheaper to package and integrate in systems. The reduction in pin count is achieved by reducing the address bus from 16 bits to 13 (limiting the available memory range from 64 KB to 8 KB) and removing a number of other pins used only for certain applications.”

The instruction set of the 6507 can address 64kB of memory, but it lacks connections to the outside world to actually use its full address range (it might even be possible for a hardware hacker to open up a 6507 and add those extra pins, depending on how much the 6507 internals differ from that of the 6502)

[klelatti]

I believe the Z8001 and Z8002 are different designs (can't find a die shot of the Z8001 but Z8002 die only has 40 pads).

Zilog could have gone down the 6507 style route, I guess, but the Z8002 would have been more expensive to produce.

So use of the word 'support' is really 'in support of a cheaper 16 bit address / 40 pin version' where savings are made not only on packaging but on the die.

[Someone]

Sorry, I wasn’t clear enough. The point was (and is) that I don’t see why limiting the address space to 64kB in one of the chips would require using segmented memory, not that they could have reused the same design between the two.

I mentioned the 6507 as an example where a CPU has a larger address space in the instruction set than the hardware allows.

I could also have mentioned the 68000 (32-bit addresses in the instruction set, but its address bus only had 24 bits, and it initially didn’t support virtual memory, so a byte was wasted (or, in some cases, put to creative use) in every pointer.

[dboreham]

> depending on how much the 6507 internals differ from that of the 6502

6502 and 6507 are the same die with some metal layer patches to tie unused pins to their inactive state: http://blog.visual6502.org/2010/09/6502-vs-6507.html