[h2odragon]

I've had a notion for years that Intel has intentionally failed to pursue some areas of performance improvement so as to reserve them for "official" users.

way, way back at the beginning of the PC revolution, for example: SRAM vs DRAM? Intel went all in on DRAM. Imagine how different the world could be today if they'd chosen differently an could expect all main RAM to be "cahce latency". DRAM would be a slower dynamic store, possibly looking more like hard drives did.

What if they'd decided that unifying a bus was a good idea instead of tossing out new ones every couple years? Imagine the longevity and variety of the VME bus ecosystem couples with the size of the PC market, in the 80s.

[mrguyorama]

> for example: SRAM vs DRAM? Intel went all in on DRAM.

This isn't really how it went. There was never a future with hundreds of megabytes of SRAM as it requires significantly more die area to produce and more power to use, making it significantly more expensive. The entire point of caches was because we couldn't afford to just make everything SRAM. Even today, we are only just getting to the point where you might have a few hundred megabytes of SRAM on the most expensive server CPUs.

[colejohnson66]

> The entire point of caches was because we couldn't afford to just make everything SRAM.

Because SRAM is expensive compared to DRAM. SRAM requires four transistors per bit, but DRAM requires just one. And that one transistor doubles as your capacitor. In addition, routing makes a single SRAM cell a bit bigger than four DRAM ones (at the same process node). So, DRAM can be packed to densities that are not feasible for SRAM. There's a reason AMD (and others) is/are starting to put cache on an entirely separate die (X3D).

[dale_glass]

We're already up to 1.1 GB of cache:

https://www.servethehome.com/amd-genoa-x-the-1-1gb-l3-cache-...

It's a little bit mindblowing.