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by ksec 1058 days ago
In terms of IPC @ GB6, with an expected ~20% gain from Zen 4, Zen 5 still need another 15% improvement before it catches up to A16.

But it will be interesting to see any write up on the benefits of using Zen5c ( Cache scaled down version of Zen 5 / P-Core ) instead of using a smaller but different uArch E Core as in Intel and ARM are doing.

1 comments

Granted that it is too early to know, but I like the AMD approach. If I’ve understood correctly, the c-cores have absolutely identical functionality on all fronts. They can’t clock as high due to the layout being redone to optimize power & area, and they lack some cache vs the high-power cores.

So essentially, any core should be able to handle any workload but you’d bias single-threaded tasks onto a few 5 GHz (or whatever) capable cores. And if you’re running well-threaded code across many cores, they’ll have to slow down anyway to stay within the power envelope, at which point all are effectively identical, barring the extra cache.

Only question is whether Intel saves a lot more power & area with their (IMHO crippled) efficiency cores. If they do, it ought to give Intel a cost/price advantage.

Perf/area for the Intel E cores is very good. IIRC they are 1/4 the size of P cores with more than half the performance, and that's not counting any L3.

And Intel is uniting the ISA with future cores.

AMD's Zen cores are (IIRC) smaller than the Intel P cores, and they have a big process/packaging advantage for now, so their "full core" strategy is indeed working very well.

They have half the L3 cache as well. However a Zen 5 chip with half L3 cache will very likely outperform a Zen 4 chip with full cache.

I wouldn’t expect any hybrid designs out of AMD for desktop, only mobile.