[chromoblob]

Without PDK, how to prototype at all? My prototype will be so out of touch with actual reality of process parameters that it will have no value. Even if it outperforms soft CPUs, I will have to redesign from scratch at the point I will get actual PDK, since my business is not creating soft CPUs. Also how do you define "comparable" for a logic-level design? I don't get how such a metric stays useful when is tried to be used for measuring actual physical designs.

> You don't need to prove that your design will beat out a similarly designed chip on advanced silicon, just that your design implemented in the slow FPGA is better at something (not necessarily everything) than a CPU trying to emulate the same behavior.

No, I do. Since, again, my objective is creating actual chip, not a soft processor.

Fine-tuning will come only after it's clear that the design is good.

I just don't see a way to create such an abstract model which will have any utility for measurement.

And the advantages depend on actual implementation, which depends on process parameters, and if I try to make a design which is good regardless of actual parameters, this will be too conservative and I may not succeed.