[snvzz]

RISC-V would not add instructions w/o a strong justification, as simplicity has value in itself, and RISC-V is very RISC in recognizing that.

If it's not that frequent and it can be done with 2 instructions, it'd be quite hard to make the argument for a dedicated instruction.

[renox]

Except that as soon as you have two instructions instead of one, people starts talking about cache pressure and turns off the safety. Optional security == no security.

[snvzz]

By that same logic, you might as well run everything in M mode.