[polpo]

More than 32 instructions per PIO block: my main current project (PicoGUS) uses 32 instructions on one PIO block and 31 on the other to handle ISA IO, ISA DMA, I2S audio out, and SPI PSRAM access. Having more would let me cut a few less corners in how ISA is handled.

More/more flexible PIO instructions: branching is very limited, you can only arbitrarily SET up to 5 pins or pindirs at once (increasing to 8 would be a godsend), stalling with a sideset repeatedly executes the sideset, etc... I could go on.

Memory mapped PSRAM: I made a library to assist with accessing SPI PSRAM but it's still just functions to get/set groups of bytes. An intelligent cache around it would also mitigate the much higher latency of accessing PSRAM as well.

More SRAM: everyone can always use more RAM!

More GPIOs: everyone can always use more GPIOs!