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by algoshift 5231 days ago
Scaled integers give you an instant and very significant boost in performance. And, what's best, in most cases the error is far smaller than 1%. I've done tons of real-time image processing work on FPGA's where you almost never use floating point hardware due to how resource intensive (and slow) it is.

Another construct that is extremely fast, cheap and can even represent nonlinear and discontinous relationships is the good-old lookup table. In hardware (FPGA) you get one result per clock cycle.

Now, of course, if you can deal with the error and name the tune with just a handful of transistors it could be a good tool to have.

It might make more sense to have a hybrid. Build a CPU that includes a traditional FPU as well as a "physics-based" FPU. Then the programmer can decide which way to go by trading off between accuracy and deterministic behavior against speed and errors.

2 comments

The traditional way has "IEEE 754" as a standard. Is there any such document for "physics-based" floating point? I'd rather call it "log-based" by the way.

And is this really floating point? As far as i understood, it is fixed point. So integers, just not twos-complement or unsigned interpretation.

How does fpga+scaled integers compare with a gpu ?
An FPGA can't compete with a dedicated chip. The additional hardware switches and routing layers needed to make an FPGA programmable means that there's a limit to how fast it can go and how much logic you can pack per square millimeter. What you can do is use an FPGA to validate the design and then convert it to an ASIC if the market can justify the costs involved.
Not sure about scaled integer but I checked fpga vs gpu for bitcoin mining and the fpga solution was an order of magnitude more expensive.