|
|
|
|
|
by sfrigon
1121 days ago
|
|
Maybe PCIe already does something similar, that's not something I have knowledge about. Though there is a small difference in my opinion, where, from the point of view of the CPU, it should behave as a normal interface, thus the driver should already exist, and only require a change in the device tree (for linux). It would still require quite a bit of work:
- The PIO has to behave bug-for-bug compatible with an existing driver
- The exposed pins need have the proper voltage levels & electrical protection .. but that's just fantasy for now. |
|
there are a few FPGA dev kits which are set up this way. I have one which has a dual core Atom CPU and a large FPGA connected via PCIe, and the speed is fast.