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by nanumbat
1132 days ago
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I'm 60 in a few days. I slid into Verilog (now SystemVerilog) about 12 years ago, mostly on FPGAs. These days I've got more work than I know what to do with. I'm planning on retiring in December. There's something to be said for a less common role, even if it does give me a splitting headache every now and then. |
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