[2bitencryption]

Can someone help me understand something about these "roadmaps", the roadmaps that go out 5+ years and define the path of transistor shrinkage?

What I don't understand is... what's preventing a chip fab from leapfrogging a transistor size? Why must there be a gradual process, planned year by year?

If one manufacturer has even a modest lead, can they use this lead to invest in two generations down the line, to keep their lead cemented?

Does the technology that supports X nm transistors become an input to building X-1 nm transistors? Or is each new generation like starting all over again?

[opwieurposiu]

In the 70s and 80s, these leapfrog events would sometimes happen. One fab would find a way to get a huge lead and others would go bust. A chip would have 10 or so masks and a wafer might take a week to go through the fab before you could fully test it.

Nowadays there are 80+ masks and a wafer takes 4+ months to go through the fab. There may be 100k process parameters to tune, and if any one of those gets too far off your yield goes to zero. Finding process improvements is more difficult with these slow iterations and everything is so tiny now it is a miracle the chips work at all. Gradual improvement is all that is left.