[nunuvit]

Turning off the transistor is only the last step and the previous steps like detection take up space. Digital CMOS is bi-state and the pin is tri-state, therefore you can conclude that there are additional components involved to achieve the third state. Spiking can be caused by suddenly shutting off current through a parasitic inductance because it sort of has inertia and can't stop immediately.

[Dylan16807]

> the previous steps like detection take up space

Yes but I'm missing why they would need significant amounts of space or power compared to the big transistor that's actually dealing with the current.

> Digital CMOS is bi-state and the pin is tri-state, therefore you can conclude that there are additional components involved to achieve the third state.

Yeah, so less to add and less to worry about compensating for because it's already handled.

> Spiking can be caused by suddenly shutting off current through a parasitic inductance because it sort of has inertia and can't stop immediately.

It already abruptly turns on and off. How does an extra trigger condition make that worse?

Or in other words, how are we not already in the worst case, with nowhere to go but up? (Since if we're just controlling the transistor better we won't be adding any more inductance than the pin already has.)

[nunuvit]

It depends on the design, but think of it this way. Digital if the smallest you can go. The protection circuit is not strictly digital, therefore it is bigger.

It's not already handled because you still need a circuit that detects the condition and switches to tri-state, if that's even how it's implemented.

Ringing and spikes come from electrical mismatch. If the protection changes the electrical properties of the pin, it may have to do more work to damp out the new mismatch. "Abrupt" isn't a single thing with a universal solution.

We're not just controlling transistors, but also sensing, shunting, clamping, damping, etc. And we're starting from the best case so we have nowhere to go but down.

You'll have to look up the rest yourself.

[Dylan16807]

I know it's "bigger". But the protection circuit should be working on a thousandth the power as the output transistor, and the chip has a zillion logic transistors already, so I'm saying the chip should be negligibly bigger.

It should always be tri state. Never allow the positive and negative output transistors to get power at the same time. If that particular detail wasn't already implemented, it'll take like two logic gates more. Which is absolutely nothing compared to the rest of the chip.

And again, don't change the electrical properties! Tap like a microamp for monitoring, on a pin that outputs milliamps.

It doesn't matter that there is no universal solution to "abrupt" because we already have an acceptable setup and it's not changing.

Sensing can be done with no real impact on output characteristics. Additional shunting and clamping is not necessary. If the damping only happens by controlling the output transitor, then it's no different from how the circuit already works.

And no we're not starting in the best case. We're starting with a transistor where the design goal was to have as fast a slew as feasible. If it already doesn't overshoot dangerously, then using the same or slower slew shouldn't be hard to avoid overshoot, all else equal.

Most of your objections come down to "if you change X you might cause problems" when I'm saying not to change X.

[nunuvit]

You're describing magic and contradicting yourself. Tri-state means everything is off, so one transistor can't also be on at the same time. Damping dissipates heat, so damping by controlling the output transistor requires a bigger output transistor.

Down below the digital level, you can't isolate decisions from each other and nothing is free.

[Dylan16807]

> tri-state means everything is off, so one transistor can't also be on at the same time.

I'm using tri-state to mean it has three distinct states. The output transistors are not sharing a control wire to make them one on, one off. If that's wrong use, I'm sorry.

The point I'm making is that it's easy to make it so the output transistors don't fight, even if the one that's enabled gets a halfsies voltage, because the other one won't also get a halfsies voltage, it will get a pure digital off.

> Damping dissipates heat, so damping by controlling the output transistor requires a bigger output transistor. Damping the output transistor also changes the electrical characteristics of the pin.

I'm assuming it's already kind of heat resistant because it only sometimes fails when shorted with no limiter at all. And if you damp it enough you won't make much heat. But fine, let's ignore that. You already brought up just turning it off at a certain point. If that's what's needed, so be it, because that won't change the characteristics.

No magic needed to keep the characteristics the same if you're just turning it off the way it normally turns off.

But I still don't understand how a transistor with an input that damps it is supposed to cause voltage spikes in excess of the same transistor with an input that doesn't damp it and always switches with maximum aggression, with only the control logic changing.

[nunuvit]

At this level, we're creating the concept of a digital state, so we can't use that result to solve problems, it's circular reasoning.

If damping makes heat, how can damping it enough make less heat? Why are you assuming that it's heat resistant if this is the level where you design the amount of heat resistance it has? Who did that work? Nobody, you have to do it yourself.

There is no control logic. It's analog. Logic is digital. Digital doesn't exist until we're done.

Sorry, but I've done all I can. Good luck in your search.