[dfox]

HDMI/DVI has dedicated pixel clock pair as do the various LVDS LCD panel interfaces (and CameraLink, which is a related PHY). These interfaces are more or less “dumb” and simply serialize the display data onto three pairs with the same timing as VGA/DPI (discrete serdeses for these interfaces tend to have internal x10 PLL for generating the bit-clock).

[jhallenworld]

The newer versions of Camera Link don't need the clock lane, FPD Link-II and above or Channel Link-II and above.