[jamesik]

I have been using this for the past few weeks for my thesis in Emacs & VS Code and have loved it! Thank you so much. Writing in a design suite was a really annoying process.

In the scope of my thesis I have to generate a lot of documentation, and I've been looking into parsers whose AST I can use to help automatically generate this. Would this be possible with vhdl_lang, if comments have been added? I currently have a Python script that regexes its way through with a lot of edge cases, but this is not a reliable way of doing it if I want to add more features.

[okraigher]

It depends on what you mean by possible. The vhdl_lang crate solves many hard problems required to do document generation such as parsing, disambiguation and connecting references. It solves it in a much more complete and better way then a regex ever could.

So vhdl_lang is a good base for a document generator but it does not implement one today. My hope with this project was to create a generic VHDL language backend that others could build tools upon instead of reinventing the wheel. I myself have focused on the language server and core library itself and not on document generation.