[wepple]

“ESP32-S2 Old version of the ESP32-S3. ESP32-S3 Low power. Dual-core. Wi-Fi and Bluetooth LE. 45 GPIOs. Camera Support. AI Support.”

That’s weird phrasing to say that the S2 is the older version, rather than the S3 is newer.

Also, the AI links to a GitHub for doing ML on all versions - exactly what is this “AI support”?

IMO the most interesting thing between the ESP32-Cx and ESP32-Sx is that the C is a RISC-V architecture

[wepple]

This is a better overview of the hardware:

https://gist.github.com/sekcompsci/2bf39e715d5fe47579fa184fa...

[eitherway]

This guide was mainly intended for beginners like me who didn't know the ESP platform yet (like me a few months ago).

I'm also working on my writing skills. So forgive me for styling errors.

I know the ESP32-Cx is based on the RISC-V architecture. Could you elaborate why this is a feature or in what way this is an advantage?

[wepple]

I realized after posting that this is a personal blog, not a corporate one - so I do regret and apologize for being rather blunt.

(I think the .io and me misreading as “etherway” made me think it was company-published and for right or wrong I assume companies only ever blog for brand recognition, so am probably over critical of them)

That’s partly a big compliment - your blog is really well styled and easy to read.

RISC-V is a fairly popular topic on HN, and for me at least it’s really interesting as both a low-level nerd, as well as curiosity about what impact it may have given we lived in an x86 world for a long time, before ARM really took hold, and now that there’s a new player and it’s an open standard is really interesting.

Could it be the “Linux kernel” of the hardware world? I have probably 20x ESP8266s doing various things in my life, maybe 5x ESP32-Sx, and will probably pick up a few -Cx, and they’ll be the first RISC-V device I own.

[eitherway]

Ah ok, I see. Although I don't fully comprehend what you are saying.

The main feature seems to be that it's an open architecture, so you don't have to rely on the things that a manufacturer provides you.

I also added your comparison table to the article.

And thank you for the compliment!

[mordae]

You don't need xtensa toolchain and use whatever your distro ships for one.

A drawback is that ESP32 RISCV cores don't feature FPU, if I am remembering correctly.

[snvzz]

>I know the ESP32-Cx is based on the RISC-V architecture. Could you elaborate why this is a feature or in what way this is an advantage?

Long term support. As Espressif has publicly declared their intent to fully move to RISC-V, it is not in your interest long-term to base your designs on the ISA that's been deprecated.