[snvzz]

I understand it's RV64GCB + a few Z extensions.

As RVA22 is not done (although almost there), we can't know whether it's compliant, but we will once it is. Expectation is yes.

Otherwise, most stuff out there will be RVA20 compliant once that's ratified, as that reflects what was already common back in chips designed in 2020, what most have been calling RV64GC.

[moloch-hai]

Thank you. Guessing the Z extensions are AES operations? Supervisor ops?

[snvzz]

The cores are SiFive U74-MC, the version is, I believe, 21G1.

These are documented.

But that design is configurable. We know B extension (optional) is enabled. I have no idea about every other setting this core can be synthesized with.

[snvzz]

Update: B extension is apparently not actually enabled. Alas.

[moloch-hai]

As usual. Sigh. Just Zpopcnt would go a long way.

[snvzz]

It might have popcnt. It might have Za and Zb.

It just doesn't claim to have B (the whole package).

[moloch-hai]

Looks like Zbb is where the "CPOP" and related instructions (popcount, count leading/trailing zeroes) live.

Zba ("and-not" etc.) and Zbs (single-bit) are more obscure and less important. Zbc (carry-less multiply) is interesting.

[Taniwha]

more like generic tweaks rather than large swathes of stuff