[zerohp]

This is pretty old. There's quite a lot that happens before instructions start on modern CPUs.

Just one small example: CPUs have many small SRAM arrays for micro-architecture features like branch predictors. Some of these need to be initialized after reset by a state machine that takes many cycles.

I have even heard of a large chip that pushes initialization vectors through the scan chains so that all flops begin in an initial state, without requiring a reset network.

[ip26]

sidebar, have a question about an older comment of yours that can't be replied to. would you reach out via email (in profile)?