[jlokier]

Not yet. With a couple of exceptions, the RISC-V CPUs described in the article are all closed source.

RISC-V is an open instruction set, so anyone can implement their own design using it, often with their own proprietary extensions.

Because the instruction set is open, there are indeed hundreds of open source RISC-V designs out there, because basic CPU design is fun, easy and educational.

However, at the moment, nearly all physical RISC-V CPUs you can actually buy, dev boards etc, and devices containing them, use closed source CPU designs.

[monocasa]

I wouldn't quite say that's the case. Two of the three full Linux capable RISC-V SoC releases this year are using open source CPU cores. The BL808 and the Allwinner D1 both use T-Head CPU cores that are available on GitHub https://github.com/T-head-Semi/openc906 . The JH7110 in the VisionFive2 and Star 64 does use a closed CPU core however.

[snvzz]

Look forward to LM4A (Sipeed, Q1). That's C910, even more capable. Far above Cortex-A72. Quite capable.

Not bad at all for an open source core.

[aappleby]

Ibex is open source and has taped out - https://github.com/lowRISC/ibex