[kevinmhickey]

I worked on a MIPS SOC that had a pair of registers that controlled DDR timing. The formula for calculating the correct timing was complicated and I am bad at math. Most of it was constant but 2 values were important. After failing to get it right a few times I wrote a firmware program (had to fit in 16k of I-Cache) to try every value, run a simple memory test, and print the number of errors to the serial console. This resulted in a grid where the number of errors would converge to 0 at the correct settings.

As it turned out, due to bugs in the hardware and the board, the "correct" answer by the manual would not work and this was the only way to get a working setting. My little hack became part of every boot of the system - it auto-generated the DDR timing. This was back in the early 2000's before DDR training at boot became standard practice.