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by debugnik
1297 days ago
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AArch64 processors are available with 64 and 128 byte cache lines, and big.LITTLE processors may report different icache line sizes on different cores[1], so a single thread can even be rescheduled across different icache line sizes (no idea about dcache). [1]: https://www.mono-project.com/news/2016/09/12/arm64-icache/ |
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