[thethirdone]

Register renaming allows CPUs to eliminate stalls due to reuse of a register; I have not noticed any compiler putting particular emphasis on interleaving accesses well.

That is actually more of a problem on in order CPUs because a single stall will hold up the entire CPU instead of take longer to commit while other stuff is going on.

[nuc1e0n]

So if compilers did this better then processors wouldn't need the extra complexity and the transistors needed to support it themselves?