[somat]

I am not convinced moore's law no longer holds true, consider that there is a third dimension that no one has yet figured out.

I am no silicon engineer but I suspect a chip that fully takes advantage of the third dimension would be something like a sponge full of built in channels for the working fluid to remove heat.

First however I suspect you will see chiplets arranged vertically like heatsink fins and the whole cpu would effectively be the water block, basically a vlsi version of the cray 3

[urthor]

https://3dfabric.tsmc.com/english/dedicatedFoundry/technolog...

What you're describing is called 3D stacking, and it works.

It's just extraordinarily complex to resolve the intra-die latency issues, and many others, when going vertical. Hence expensive.

[petra]

3D is already being used for ram/flash IC's. That's possible because most memory cells aren't being used in a memory chip - so heat density is reasonable.

3D is also used in AMD's 3D cache.

But 3D logic on logic is more complicated because of heat issues. AFAIK there's no workable technical solution for that yet.

[threatripper]

Heat removal is basically a 2D problem. A 3D pipe has a 2D cross section in which fluid can transport heat. Right now we are mostly limited by heat removal, so adding more height to the chip doesn't help anything with the heat. Also, the chips are already many layers thick and each layer means processing steps which means time and money.

If you look into flash memory which aren't limited by heat, they have dozens of functional layers already and then we also stack those silicon wafers.