[aseipp]

Yes, but that's not the problem. The problem is these Agilex devices are insane overkill for that task, and you likely won't be able to buy the SKUs in a reasonable form factor or price for that use case. The Mister worked so well because the actual design of the device has the right blend of peripherals/compute and Intel/terASIC ate the NRE to design and manufacture it, and that's because they intended it use it to teach and educate people and needed a lot of volume for that. Agilex isn't a teaching part. It's their most advanced top-of-the-line part with its own logic design requirements that differentiate it from earlier lines (Arria 10 and prior.)

You likely aren't going to see "consumer-oriented" Agilex-powered devices in similar form factors anytime soon; most of the compute power of the fabric would be completely wasted without fast peripherals/storage anyway (the fabric can be clocked very high if you pipeline enough) and the shipping volume to make the boards attractive/low-price enough would need to be pretty decent. This means the board would actually end up expensive; why pay so much for the FPGA if all the I/O sucks? But good I/O is expensive. The Agilex parts are some of Intel's most complex devices on their latest "Intel 7" process too, it's not cheap.

I guess it's maybe something that would be possible to crowdfund in low volumes, but it's a truly huge amount of work even before you get to price. Designing the board, getting the software and tools working, documentation, that's before you even manufacture. And realistically there are probably other FPGA options that would be cheaper and more readily available. Something like a Kintex-7, or Arria 10 part would probably do just as well for significantly cheaper, I'd think, but it's hard to guess unless you have more concrete requirements in terms of LEs/memory/clock speeds.

Maybe if you pray they will make an Agilex-D PCIe developer kit that "only" costs $2k USD, requires tiny fans that sound like jet engines, and has 1 HDMI out.

[radicalbyte]

You would easily eventually get into volumes of 2-3 million a year if you could get something out which is powerful enough for PS2 level re-creation.

The MiSTER project is already inspiring a generation to learn how to program FPGAs, those skills could be applied to improve performance in a lot of applications.

[naikrovek]

I'd like to know how many MiSTer owners there are in the world.

Part of me wants to say it's a lot, and part of me wants to say that the retro gaming community is peanuts compared to other FPGA consumers.

[Aromasin]

I suspect the same. My view is that the MiSTer FPGA crowd is very loud in the subreddits and discord channels of the world, but in reality most people using FPGAs in any significant capacity are much more tight lipped about it.

[foldor]

Yes, but recreating the PS2 is an order of magnitude more complicated than a PS1, which is still a massive undertaking for an individual. Even supposing we had a cheap enough FPGA, who would write the HDL to simulate a PS2?

[galangalalgol]

The ps1 cpu was just a mips. Building a mips cpu with an fpga is a normal required undergrad project for a cs degree or it was a couple decades ago. I was feeling dismissive until I looked at the specs for the gpu and spu... That was some serious work for the ps1. The ps2 had that odd cell processor, or emotion engine whatever you want to call it. Its still basically multiple simplified mips cores but now all the stuff to synchronize them correctly? I'm surprised the ps2 emulators are as close as they are. Doing it all in hdl, and with the upgraded gpu, that is enough work that I wonder if software emulation fidelity wouldn't reach hardware fidelity before the fpga design did.

[muziq]

PS3 was Cell processor.. PS2 Emotion Engine..

[galangalalgol]

Ah! The ps2 was still like 8 cores right?