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by kyaghmour
1367 days ago
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There is nothing precluding ARM from providing a RISC-V fetch and decode unit as an option with their IP. Like having a POSIX compatibility layer or Linux subsystem in Windows. There is a lot AXI-based IP blocks out there, even in the RISC-V ecosystem. Having a RISC-V from ARM would make the switch more or less painless and the ability to benefit from known-to-be-good IP. I'd conjecture that there are likely already toy projects at ARM to do just that, if nothing else as POCs by individual engineers eager to show colleagues how easily this could be done. Now, whether strategically ARM would do this is another question. I suspect they'd hold off as long as it was realistically possible. But the deal is that an ISA is only one part of a huge stack of IP. And in that arena, ARM has a huge lead, especially considering that the granularity of the increment in terms of potential open source contributions is gated by huge costs that individuals can rarely take on on their own and lots of often arcane domain-specific knowledge. |
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More likely is that they could loosen up some of the IP restrictions around the Arm ISA. Allowing extensions, maybe making simpler cores available for free.