[jpfr]

There's a community doing "fpga golf". That is, reducing the number of LUT required to implement a CPU of a given ISA.

A basic RV32 CPU is down to 500-700 LUT.

    https://github.com/YosysHQ/picorv32
    https://github.com/olofk/serv

A minimal 8051 requires about 300 LUT.

    https://github.com/MicroCoreLabs/Projects/tree/master/MCL51

Not sure how this translates from an FPGA to a transistor count. But RV32 and 8051 should be within a factor of 2-3.

[Taniwha]

If all you're doing is making a core with a little ROM, a USB interface and a flash interface chances are your design is pad limited - it probably doesn't matter which CPU you use provided it's tinyish

(oh and 8051 are a pain to work with, they've taken far too much of my lifetime, they need the stake thru the heart thing)

[snvzz]

>If all you're doing is making a core with a little ROM, a USB interface and a flash interface

An interesting observation is that RV32 has excellent code density. Meaning, in this sort of scenario, the ROM could be much smaller, or fit way more code at the same size.

[userbinator]

within a factor of 2-3

That's still a huge difference, and as I mentioned above, the 8051 is found in applications which are very sensitive to cost. In terms of gate count, the lowest numbers I could find for a RISC-V core are in the 10-20k range, while an 8051 goes down to 2.7k:

https://www.electronicsweekly.com/news/design/eda-and-ip/805...