[WillFlux]

Even if you don’t have an FPGA, you can run these hardware designs on your PC with SDL and Verilator.

It’s really simple to set up: https://projectf.io/posts/verilog-sim-verilator-sdl/

[nomel]

The big disadvantage of not having a real FPGA is that you won't be concious of the very real LUT/gate limits. A simulation will happily allow you to apply all sorts of nice compartmentalizations and abstractions, without making your understand that they will cost significant money if you tried to find an FPGA to fit them into.

This was my biggest shock when first working with FPGAs, while naively using a software mentality. Most everything had to be re-written once the simulations were done.