[olliej]

That is Apple silicon specific (at least for now?) as it isn’t a behaviour inherent to the ISA but rather it is yet another cache related side channel. It is of course entirely possible that other vendors will have the same info leak, but that particular paper seemed to be only interested in Apple hardware - I’m unsure how widely deployed PAC is in other vendor hardware so don’t know how feasible testing is.

[edit: this is also a 2017 article (I hadn't realized originally, cheers @dmytrish) so the gcc, etc support comments are presumably outdated]

[Syonyk]

If I recall that paper properly, they chose to do their work on the M1 because it was the only available chip with PAC at the time.

[pjmlp]

They could have tried SPARC ADI instead.

[AceJohnny2]

only available _ARM_ chip with PAC.