[q3k]

(Not the author, but in the know.)

This uses the Skywater 130 process. It’s backed by an open source PDK (SKY130B), and is going to be taped out via an Efabless shuttle, just like OpenMPW shuttles sponsored by Google.

The difference between this and a ‘plain’ OpenMPW shuttle is that this can fit a ton of tiny/toy/demo designs, enabling a lot of people to get their toes wet with ASIC design without having to take up a ‘large’ shuttle spot.

https://skywater-pdk.readthedocs.io/en/main/

[thrtythreeforty]

The Skywater shuttles are never full, to the best of my knowledge. However, it is a lot of work to get off the ground with the PDK (synthesis and physical design for chips is a totally separate set of skills on top of logic design), so if this further lowers the barrier to entry then that's fantastic

[rrss]

The last 3 or 4 openmpw shuttles have been full.

[thrtythreeforty]

That's great to hear, I'm glad to be corrected.

[jecel]

Actually, all of the open shuttles have been full with the last few oversubscribed by larger and larger margins (about 100% for MPW6 if I remember correctly).

It was the commercial shuttles, called ChipIgnite, that have had space left over.

[rrss]

I had in mind that OpenMPW-1 was not quite full, and looking now on efabless.com I see 37 projects submitted for MPW-1.

but i don’t think it really matters - there have been lots of submissions for all of them and a ton of cool stuff, and yeah the recent open shuttles are definitely full :)