[Buraksr]

TI's fabs are mainly focused on analog, so the requirements are a bit different. IIRC we have 3 130-65nm layers for digital in our mixed signal designs which is roughly on par with a the process technology Intel used in 2005.

[anfilt]

The majority ICs used for products and such do not need bleeding edge node sizes.

[Buraksr]

True. That is part of the reason why only 3 of maybe 30-60 layers are that small.

Analog gets some signal integrity benefits from larger transistors, and often we have fairly large fets for low rdson and high voltage tolerance.