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by ralferoo
1434 days ago
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And just in case you're really really short of GPIO, you can use a 74595 shift register to feed the column and row selection, so you'd just need clock and data outputs. You could also use 74251 8-to-1 multiplexer as that has an output enable, so you could use your remaining 2 outputs from the shift register to enable one of the two multiplexer chips. If you're not latching the outputs on the shift register, then you'd want a resistor between the two outputs so they don't fight. So then, the ultimate reduction in GPIO would be to 3 lines - clock, data, in. Obviously, for each of these, as you reduce the number of IO pins, you increase the time required to scan the matrix. |
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I have a current project where I needed to drive a large number of CS lines on a SPI bus. Others suggested I/O expanders and even - good lord - an entire M0 controller to handle it. I solved it with a bitbanged chain of 74HC595s, under $1 in BOM cost.