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by avianes
1425 days ago
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> Which machine language is the microcode written in? The mirocode is generally a sequence of uOps.
But in Intel's case, there seems to be a more complex mechanism, called XuCode, that generates the uOps sequence.
The XuCode ISA seems to be based on x86-64, as Intel says [1]: > XuCode has its own set of instructions based mostly on the 64-bit Instruction Set, removing some unnecessary instructions, and adding a limited number of additional XuCode-only instructions and model specific registers (MSRs) to assist with the implementation of Intel SGX. PS: Decoding of the XuCode microcode can potentially give precious information about uops encoding PS2: You can find more information on uops encoding in another work from the same team [2]. [1]: https://www.intel.com/content/www/us/en/developer/articles/t... [2]: https://github.com/chip-red-pill/uCodeDisasm |
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https://www.intel.com/content/www/us/en/developer/articles/t...
What this seems to be is:
- Intel CPUs with SGX have an additional CPU mode that understands and runs XuCode, "XuCode is implemented as a variant of 64-bit mode code, running from protected system memory, using a special execution mode of the CPU."
-- I know that "ring" terminology is used to describe CPU modes, e.g. calling a hypervisor setup ring -1, SMM ring -2, and the Intel management engine ring -3. Seems like this mode is something like ring -2.5.
- "It is authenticated and loaded as part of a microcode update and is installed into a Processor Reserved Memory (PRM) range, typically allocated by system firmware. The memory range itself is protected from software and direct memory accesses by the Processor Reserved Memory Range Registers (PRMRRs)."
So the BIOS steals a bit of your RAM (which the ME already does), sets it up to be the PRM, and a microcode update unpacks XuCode now contained in the microcode data, and puts it in this PRM. I guess some SGX instructions are essentially a specialized form of INT instructions that "exception out" specifically to this special CPU mode/PRM space.
So I'm under the impression XuCode is essentially called by the microcode when certain SGX instructions are encountered.
Weird ...