[InitialLastName]

EDA software provides the infrastructure for projects with very high NRE and with low tolerance for failure (you can't just recompile and deploy a new chip design for free when you've already built a million bricks). Their entire business model is built around risk avoidance, so it would require an enormous improvement in efficiency for a client to take a risk on a "disrupting" startup's tools.

[kickingvegas]

I used to work in EDA/Semi-IP as well. In addition to the common argument that tool changes are avoided to mitigate risk because of expensive iteration costs, another rationale is that the design and manufacturing costs of making a chip are so high that integrators are less fixated on switching tools for savings because they are not that significant to the overall budget.

[rathel]

Yes, BUT... Each new technology node (excluding shrinks) already disrupts the flow in many breaking ways. Seemingly small changes, new DRC requirements, the need to model more side effects all cooperate to make porting to a new node all but easy.

[iancmceachern]

And you can't just upgrade the stack every 2 weeks during a 2 year project. There is a infamous example of this in the mechanical cad world with airbus and catia where they had to rebuild half a plane in a different version of cad