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by gchadwick
1522 days ago
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Taping out an actual chip inevitably involves IP that's not yours, e.g. the standard cell library and other 'physical' IP like memories and flash. You cannot open source that as it is not yours and in general the owners of it won't want to open source it either (though there are exceptions e.g. the Skywater 130nm PDK https://github.com/google/skywater-pdk). In OpenTitan we've built all the 'logical' IP ourselves from the ground up. This is the Verilog RTL you can see in our repository but you need the 'physical' IP to make a real chip. We haven't built any physical IP so we need to get it from the traditional industry sources which means traditional industry licensing (i.e. very much not open). |
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